The invention relates generally to methods, semiconductor devices, electrical and electronic circuits, and products useful in protecting against damage to electronics from electrostatic discharge (ESD) and other high voltage transients.
ESD is a pervasive concern in the design of electronic devices using semiconductor components, and for integrated circuits in particular. As integrated circuit fabrication processes improve and reduce distances between semiconductor structures, the need for improved ESD protection likewise increases. A common approach to ESD protection is to provide a clamp device that provides a shunt path between the positive and negative inputs of a protected semiconductor device upon being triggered by an ESD event. One concern in selecting an ESD protection strategy is differentiating between a power up event and an ESD event. Differentiating between power-up and ESD events is necessary to allow a protected semiconductor device to power up and not to activate the clamp circuit during power up. Another concern is to avoid an oscillation condition of the clamp device. Oscillation can occur when the clamp device is triggered and reduces the voltage during an ESD event enough to reset the clamp device while the effect of an ESD event is still present, resulting in the voltage rising again and re-triggering the clamp device. Accordingly, there is a need for an ESD protection means that allows for power up without triggering the protection circuit, and when triggered by an ESD event, does not oscillate.